JPH0432421B2 - - Google Patents

Info

Publication number
JPH0432421B2
JPH0432421B2 JP57144308A JP14430882A JPH0432421B2 JP H0432421 B2 JPH0432421 B2 JP H0432421B2 JP 57144308 A JP57144308 A JP 57144308A JP 14430882 A JP14430882 A JP 14430882A JP H0432421 B2 JPH0432421 B2 JP H0432421B2
Authority
JP
Japan
Prior art keywords
channel
input
connection request
channels
control device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP57144308A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5935224A (ja
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP14430882A priority Critical patent/JPS5935224A/ja
Publication of JPS5935224A publication Critical patent/JPS5935224A/ja
Publication of JPH0432421B2 publication Critical patent/JPH0432421B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/122—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware performs an I/O function other than control of data transfer
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/24—Handling requests for interconnection or transfer for access to input/output bus using interrupt

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
JP14430882A 1982-08-20 1982-08-20 デ−タ処理システムのチヤネル制御方式 Granted JPS5935224A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14430882A JPS5935224A (ja) 1982-08-20 1982-08-20 デ−タ処理システムのチヤネル制御方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14430882A JPS5935224A (ja) 1982-08-20 1982-08-20 デ−タ処理システムのチヤネル制御方式

Publications (2)

Publication Number Publication Date
JPS5935224A JPS5935224A (ja) 1984-02-25
JPH0432421B2 true JPH0432421B2 (en]) 1992-05-29

Family

ID=15359058

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14430882A Granted JPS5935224A (ja) 1982-08-20 1982-08-20 デ−タ処理システムのチヤネル制御方式

Country Status (1)

Country Link
JP (1) JPS5935224A (en])

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61163455A (ja) * 1985-01-16 1986-07-24 Fujitsu Ltd チャネル制御方法

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5220295B2 (en]) * 1974-08-21 1977-06-02
JPS532049A (en) * 1976-06-29 1978-01-10 Hitachi Ltd Input output processing device
JPS54531A (en) * 1977-06-03 1979-01-05 Hitachi Ltd Channel control system

Also Published As

Publication number Publication date
JPS5935224A (ja) 1984-02-25

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